Base DPU types in the C API. More...

#include <stdint.h>
#include <dpu_target.h>

Include dependency graph for dpu_types.h:

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Data Structures
struct	dpu_slice_target
	Target for a CI Select command. More...

struct	dpu_set_t
	A set of DPU devices. More...

struct	dpu_symbol_t
	Information for a symbol from a DPU program. More...

struct	dpu_incbin_t
	Information on a binary embedded in the program with "DPU_INCBIN". More...

struct	dpu_bit_config
	Configuration used to handle bit shuffling. More...

struct	dpu_carousel_config
	Timing configuration for CI <-> DPU communication. More...

struct	dpu_repair_config
	Memory bank reparation configuration. More...

struct	dpu_context_t
	Debugging information. More...

struct	sg_xfer_buffer
	scatter gather transfer buffer used to store multiple blocks for one DPU More...

Macros
#define	DPU_MAX_NR_CIS 8
	Maximum number of Control Interfaces in a DPU rank.

#define	DPU_MAX_NR_DPUS_PER_CI 8
	Maximum number of DPUs in a Control Interface.

#define	DPU_BOOT_THREAD 0
	Number of the DPU thread which is launched when booting the DPU.

#define	DPU_MAX_NR_GROUPS 8
	Maximum number of groups in a Control Interface.

#define	DPU_BITFIELD_ALL ((dpu_bitfield_t)-1)
	Bitfield representing all DPUs of a CI.

#define	DPU_SLICE_TARGET_TYPE_NAME(target_type)
	Transform a slice target type to its associated string.

#define	DPU_API_DEPRECATED
	Attribute used on deprecated functions.

#define	DPU_MRAM_HEAP_POINTER_NAME
	Name of the symbol pointing at the start of the unused MRAM in a DPU program.

Typedefs
typedef uint16_t	dpu_rank_id_t
	ID of a DPU rank.

typedef uint32_t	dpu_id_t
	ID of a DPU.

typedef uint8_t	dpu_slice_id_t
	ID of a DPU rank slice.

typedef uint8_t	dpu_member_id_t
	ID of a DPU rank slice member.

typedef uint8_t	dpu_group_id_t
	ID of a DPU rank slice group.

typedef uint8_t	dpu_thread_t
	Index of a DPU thread.

typedef uint8_t	dpu_notify_bit_id_t
	Index of a DPU notify bit.

typedef uint16_t	iram_addr_t
	Address in IRAM.

typedef uint32_t	wram_addr_t
	Address in WRAM.

typedef uint32_t	mram_addr_t
	Address in MRAM.

typedef mram_addr_t	dpu_mem_max_addr_t
	Bigger storage for a DPU memory address.

typedef uint16_t	iram_size_t
	Size in IRAM.

typedef uint32_t	wram_size_t
	Size in WRAM.

typedef uint32_t	mram_size_t
	Size in MRAM.

typedef mram_size_t	dpu_mem_max_size_t
	Bigger storage for a DPU memory size.

typedef uint64_t	dpuinstruction_t
	DPU instruction.

typedef uint32_t	dpuword_t
	DPU word in WRAM.

typedef uint8_t	dpu_bitfield_t
	Bitfield of DPUs in a CI.

typedef uint8_t	dpu_ci_bitfield_t
	Bitfield of CIs in a rank.

typedef enum _dpu_clock_division_t	dpu_clock_division_t
	Clock divisor for the DPU clock.

typedef enum _dpu_event_kind_t	dpu_event_kind_t
	High-level event that may be passed to the backends.

typedef enum _dpu_set_kind_t	dpu_set_kind_t
	DPU device type of a DPU set.

typedef enum dpu_transfer_matrix_type_t	dpu_transfer_matrix_type_t
	Type of buffer to transfer.

Enumerations
enum	_dpu_clock_division_t { DPU_CLOCK_DIV8 = 0x0, DPU_CLOCK_DIV4 = 0x4, DPU_CLOCK_DIV3 = 0x3, DPU_CLOCK_DIV2 = 0x8 }
	Clock divisor for the DPU clock.

enum	dpu_slice_target_type { DPU_SLICE_TARGET_NONE, DPU_SLICE_TARGET_DPU, DPU_SLICE_TARGET_ALL, DPU_SLICE_TARGET_GROUP, NR_OF_DPU_SLICE_TARGETS }
	Target type for a CI Select command.

enum	_dpu_event_kind_t { DPU_EVENT_RESET, DPU_EVENT_EXTRACT_CONTEXT, DPU_EVENT_RESTORE_CONTEXT, DPU_EVENT_MRAM_ACCESS_PROGRAM, DPU_EVENT_LOAD_PROGRAM, DPU_EVENT_DEBUG_ACTION }
	High-level event that may be passed to the backends.

enum	_dpu_set_kind_t { DPU_SET_RANKS, DPU_SET_DPU }
	DPU device type of a DPU set. More...

enum	dpu_temperature { DPU_TEMPERATURE_LESS_THAN_50 = 0, DPU_TEMPERATURE_BETWEEN_50_AND_60 = 1, DPU_TEMPERATURE_BETWEEN_60_AND_70 = 2, DPU_TEMPERATURE_BETWEEN_70_AND_80 = 3, DPU_TEMPERATURE_BETWEEN_80_AND_90 = 4, DPU_TEMPERATURE_BETWEEN_90_AND_100 = 5, DPU_TEMPERATURE_BETWEEN_100_AND_110 = 6, DPU_TEMPERATURE_GREATER_THAN_110 = 7 }
	Temperature measure, in degree Celsius, in a DPU.

enum	dpu_pc_mode { DPU_PC_MODE_12 = 0, DPU_PC_MODE_13 = 1, DPU_PC_MODE_14 = 2, DPU_PC_MODE_15 = 3, DPU_PC_MODE_16 = 4 }
	Configuration for the instruction address size on a DPU. More...

enum	dpu_transfer_matrix_type_t { DPU_DEFAULT_XFER_MATRIX, DPU_SG_XFER_MATRIX }
	Type of buffer to transfer. More...

Detailed Description

Base DPU types in the C API.

Enumeration Type Documentation

DPU device type of a DPU set.

Enumerator
DPU_SET_RANKS	Set is composed of DPU ranks.
DPU_SET_DPU	Set is composed of one DPU.

Configuration for the instruction address size on a DPU.

Enumerator
DPU_PC_MODE_12	Instruction addresses are 12-bit long.
DPU_PC_MODE_13	Instruction addresses are 13-bit long.
DPU_PC_MODE_14	Instruction addresses are 14-bit long.
DPU_PC_MODE_15	Instruction addresses are 15-bit long.
DPU_PC_MODE_16	Instruction addresses are 16-bit long.

Type of buffer to transfer.

Enumerator
DPU_DEFAULT_XFER_MATRIX	The host destination/source buffer is a single chunk of memory
DPU_SG_XFER_MATRIX	The host destination/source buffer is scattered across multible independent blocks of memory